2.5D packaging brings verification system to 15 billion doors

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Siemens Digital Industries Software has launched the next generation of its Veloce hardware-assisted verification system with key use of packaging 2.5 to increase capacity.

The Veloce HYCON (HYbrid CONfigurable) system combines a virtual platform, hardware emulation and FPGA (Field Programmable Gate Array) prototyping technologies for the development of advanced system-on-a-chip designs.

Developers can use their own early-cycle virtual SoC models on a line of processors that has been extended to include the AMD EPYC 7003 series. They can then start running actual firmware and software on Veloce Strato + to provide visibility. down to the lowest hardware level, with an upgrade to allow two virtual users at the same time.

The key is that developers can then move the same design to Veloce Primo to validate the software / hardware interfaces and run the software at the application level while approaching actual system speeds. To make this approach as efficient as possible, Veloce Strato + and Veloce Primo use the same RTL, the same virtual verification environment, the same transactors and models to maximize the reuse of verification media, environment and test content.

Veloce Strato + is an upgrade to the capabilities and capabilities of the Veloce Strato hardware emulator, which now supports up to 15 billion gates. This is based on the Crystal 3+ package which provides 1.5 times the emulation capacity using a 2.5D approach that combines multiple matrices into a single package.

Strato + uses the same proprietary 28nm chip from the second generation system launched in 2017 by Mentor Graphics with the same chassis that contains 64 cards. Moving memory around the enclosure as a matrix reduces the complexity of the board (which Siemens calls the AVB) and allows more chips per board, from 16 to 24. This allows each chassis to emulate 3.3. billion doors.

“In 2017, we said Strato was the path to 15 billion doors, one chassis contains 2.5 billion doors with four in one frame to provide 10 billion doors of capacity with 16 chips on 64 cards,” said Jean-Marie Brunet, Senior Director of Product Management and Engineering for the Scalable Verification Solutions division at Siemens EDA.

“We kept the logic chip intact and moved the memory components used for the trace into a 2.5D package. Therefore, you have more free space on the card and 24 chips, which is 15 billion gates, ”he said.

“The die is still at 28nm – it’s still the most efficient process in terms of performance and price, because it’s the latest single-mask silicon process without a double pattern. It’s a reduction in risk for our customers, ”he told eeNews Europe. AMD’s feedback says it’s a push button change, the behavior is the same because it’s the same die, ”he added.

The increase in energy consumption was also discussed. The second-generation chassis required 50 kW, but the Strato + sees its power increase by 20 to 22%, says Brunet. “By increasing the capacity, the efficiency is higher, the W / MG is lower and that is what customers want,” he said.

For prototyping, Veloce Primo is a modular FPGA prototyping system developed in-house and based on Xilinx FPGAs that can scale up to 320 devices. Delivering our newer, industry-leading Virtex UltraScale + VU19P device, enabling scalability and capacity for this new product offering, ”said Hanneke Krekels, senior manager, Core Vertical Markets at Xilinx.

“As we enter the new semiconductor megacycle, the era of software-centric SoC design requires a radical change in functional verification systems to meet new requirements,” said Ravi Subramanian, vice president principal and general manager of Siemens EDA.

“The introduction of the next-generation Veloce system that addresses these new key requirements is a direct result of Siemens’ targeted investment to provide our customers with a complete and integrated system with a clear roadmap for the next decade. With today’s announcement, we are setting a new standard for a system capable of supporting new verification requirements in a diverse set of industries spanning computing and storage, AI / ML, 5G, networks and automotive. “

AMD was the primary development partner. “AMD uses Veloce emulation platforms as part of our pre-silicon verification and validation solutions,” said Alex Starr, business partner, method architect at AMD. “The high performance designs we create demand scalable, reliable and innovative emulation solutions. We are delighted to see the 2nd and 3rd Generation AMD EPYC processors qualified for use with the Veloce Strato and Veloce Strato + platforms.

The consistent working model with Veloce Strato + in terms of software workloads, design patterns and front-end compilation technology reduces the cost of verification by using the right tool for the task where emulation and prototyping work together as complementary solutions for a better result in the shortest cycle. Veloce Primo also supports virtual use (emulation offload) and in-circuit emulation (ICE) models for optimal performance while maintaining accurate clock ratios in both modes.

“Growing demand for IT across industries means time to market is critical,” said Tran Nguyen, senior director of design services at ARM. “Siemens’ Veloce Primo enterprise FPGA prototyping solution helps Arm quickly resolve design issues and meet verification goals so that our ecosystem can deliver quality Arm-based SoCs to support the rapid pace of business. innovation. “

The Hycon system extends to the office with Veloce proFPGA through an OEM agreement with Pro Design. This goes from 40 million gates to 800 million gates based on high-end FPGAs, including the Intel Stratix 10 GX 10M device and Virtex UltraScale + VU19P.

“The advanced technology in the proFPGA family offers many advantages for validating current AI / ML, 5G and data center ASIC designs,” said Gunnar Scholl, CEO of Pro Design. “We are delighted to partner with Siemens. Our collective experience, knowledge and strategy for the desktop FPGA prototyping market is recognized, and we are excited to accelerate market penetration in this space through collaboration with Siemens.

The complete Veloce hardware-assisted verification system is now available and used in production by major customers around the world.

https://eda.sw.siemens.com/en-US/ic/veloce/

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