SiPearl says Rhea Exascale chip has entered accelerated simulation phase for launch in 2022

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SiPearl, the company that designs the Rhea microprocessor for Europe’s exascale supercomputer, said it has taken an important step ahead of the chip’s planned launch in 2022. The company said it was entering an “accelerated simulation phase” on the market. ‘Veloce Strato hardware emulator from Siemens software for digital industries.

SiPeal said the hardware emulation platform provides its chip designers with a high-speed verification environment that allows them to accelerate the functional verification of pre-silicon and pre-production in a virtual environment.

The Veloce Strato platform has scalable capacity up to 15B Gate. It is designed to provide rapid compilation and full design visibility for verification of advanced chip designs.

“Through our collaboration with Siemens, as we prepare for Rhea to enter the market, we can benefit from a powerful and flexible emulation infrastructure, combined with the expertise of the team, which allows us to accelerate its simulation with uncompromising visibility and debugging. This technological choice also marks our strong commitment to our future customers in order to support their own level of performance ”, declared Philippe Notton, CEO and founder of SiPearl, the Franco-German company which supports the European Transformers Initiative.


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